M.Tech. from NIT Hamirpur
UGC NET qualify in year 2012 in "Electronic science"
Conduct two week summer school on "Analog Electronics using Cadence Orcad"
VLSI Design Automation and Techniques
Integrated Circuits, Electronics Circuits, Fundamental of Electronic Devices, Advance Semiconductor Devices, Laser System and Application, VLSI Design
Rakesh Kumar, Ashwani Kumar Rana,"Impact of gate structure on MagFET " National conference on VLSI Design and Embedded system at CEERI Pilani Oct 12-14, 2011